module BKP_RXALG_QUAD(
   input                  GTM_RESET,
   input                  GTM_CLK155M52,
   input                  GTM_BKP_FP8K,

   input                  RXFRM_CLK_0,
   input                  RXFRM_CLK_1,
   input                  RXFRM_CLK_2,
   input                  RXFRM_CLK_3,

   input[15:0]            RXFRM_DATA_0,
   input[15:0]            RXFRM_DATA_1,
   input[15:0]            RXFRM_DATA_2,
   input[15:0]            RXFRM_DATA_3,

   input                  RXFRM_FP8K_0,
   input                  RXFRM_FP8K_1,
   input                  RXFRM_FP8K_2,
   input                  RXFRM_FP8K_3,

   output[9:0]            ALG_FP8K,
   output[15:0]           ALG_RD_0,
   output[15:0]           ALG_RD_1,
   output[15:0]           ALG_RD_2,
   output[15:0]           ALG_RD_3
   );


reg[9:0]                  rxfrm_wr_cnt810_0, rxfrm_wr_cnt810_1, rxfrm_wr_cnt810_2, rxfrm_wr_cnt810_3;
reg[9:0]                  alg_rd_cnt810;
reg                       alg_rdwt1_fp8k, alg_rdwt2_fp8k;

always @(posedge RXFRM_CLK_0 or posedge GTM_RESET) begin
   if (GTM_RESET==1'b1)
      rxfrm_wr_cnt810_0[9:0]                 <= 10'd0;
   else begin
      if (RXFRM_FP8K_0==1'b1)
         rxfrm_wr_cnt810_0[9:0]              <= 10'd1;
      else if (rxfrm_wr_cnt810_0[9:0]==10'd809)
         rxfrm_wr_cnt810_0[9:0]              <= 10'd0;
      else
         rxfrm_wr_cnt810_0[9:0]              <= rxfrm_wr_cnt810_0[9:0] +10'd1;
   end
end
always @(posedge RXFRM_CLK_1 or posedge GTM_RESET) begin
   if (GTM_RESET==1'b1)
      rxfrm_wr_cnt810_1[9:0]                 <= 10'd0;
   else begin
      if (RXFRM_FP8K_1==1'b1)
         rxfrm_wr_cnt810_1[9:0]              <= 10'd1;
      else if (rxfrm_wr_cnt810_1[9:0]==10'd809)
         rxfrm_wr_cnt810_1[9:0]              <= 10'd0;
      else
         rxfrm_wr_cnt810_1[9:0]              <= rxfrm_wr_cnt810_1[9:0] +10'd1;
   end
end
always @(posedge RXFRM_CLK_2 or posedge GTM_RESET) begin
   if (GTM_RESET==1'b1)
      rxfrm_wr_cnt810_2[9:0]                 <= 10'd0;
   else begin
      if (RXFRM_FP8K_2==1'b1)
         rxfrm_wr_cnt810_2[9:0]              <= 10'd1;
      else if (rxfrm_wr_cnt810_2[9:0]==10'd809)
         rxfrm_wr_cnt810_2[9:0]              <= 10'd0;
      else
         rxfrm_wr_cnt810_2[9:0]              <= rxfrm_wr_cnt810_2[9:0] +10'd1;
   end
end
always @(posedge RXFRM_CLK_3 or posedge GTM_RESET) begin
   if (GTM_RESET==1'b1)
      rxfrm_wr_cnt810_3[9:0]                 <= 10'd0;
   else begin
      if (RXFRM_FP8K_3==1'b1)
         rxfrm_wr_cnt810_3[9:0]              <= 10'd1;
      else if (rxfrm_wr_cnt810_3[9:0]==10'd809)
         rxfrm_wr_cnt810_3[9:0]              <= 10'd0;
      else
         rxfrm_wr_cnt810_3[9:0]              <= rxfrm_wr_cnt810_3[9:0] +10'd1;
   end
end


always @(posedge GTM_CLK155M52 or posedge GTM_RESET) begin
   if (GTM_RESET==1'b1)
      alg_rd_cnt810[9:0]                     <= 10'd0;
   else begin
      if (GTM_BKP_FP8K==1'b1)
         alg_rd_cnt810[9:0]                  <= 10'd1;
      else if (alg_rd_cnt810[9:0]==10'd809)
         alg_rd_cnt810[9:0]                  <= 10'd0;
      else
         alg_rd_cnt810[9:0]                  <= alg_rd_cnt810[9:0] +10'd1;
   end
end

always @(posedge GTM_CLK155M52 or posedge GTM_RESET) begin
   if (GTM_RESET==1'b1) begin
      alg_rdwt1_fp8k                           <= 1'b0;
      alg_rdwt2_fp8k                           <= 1'b0;
   end
   else begin
      alg_rdwt1_fp8k                           <= GTM_BKP_FP8K;
      alg_rdwt2_fp8k                           <= alg_rdwt1_fp8k;
   end
end
  assign  ALG_FP8K   = alg_rdwt2_fp8k;



BKP_XLNX_RAM16K_16_16         INST_BUFF_0(
   .clka                      (RXFRM_CLK_0),
   .wea                       (1'b1),
   .addra                     (rxfrm_wr_cnt810_0[9:0]),
   .dina                      (RXFRM_DATA_0[15:0]),
   .clkb                      (GTM_CLK155M52),
   .addrb                     (alg_rd_cnt810[9:0]),
   .doutb                     (ALG_RD_0[15:0])
   );
BKP_XLNX_RAM16K_16_16         INST_BUFF_1(
   .clka                      (RXFRM_CLK_1),
   .wea                       (1'b1),
   .addra                     (rxfrm_wr_cnt810_1[9:0]),
   .dina                      (RXFRM_DATA_1[15:0]),
   .clkb                      (GTM_CLK155M52),
   .addrb                     (alg_rd_cnt810[9:0]),
   .doutb                     (ALG_RD_1[15:0])
   );
BKP_XLNX_RAM16K_16_16         INST_BUFF_2(
   .clka                      (RXFRM_CLK_2),
   .wea                       (1'b1),
   .addra                     (rxfrm_wr_cnt810_2[9:0]),
   .dina                      (RXFRM_DATA_2[15:0]),
   .clkb                      (GTM_CLK155M52),
   .addrb                     (alg_rd_cnt810[9:0]),
   .doutb                     (ALG_RD_2[15:0])
   );
BKP_XLNX_RAM16K_16_16         INST_BUFF_3(
   .clka                      (RXFRM_CLK_3),
   .wea                       (1'b1),
   .addra                     (rxfrm_wr_cnt810_3[9:0]),
   .dina                      (RXFRM_DATA_3[15:0]),
   .clkb                      (GTM_CLK155M52),
   .addrb                     (alg_rd_cnt810[9:0]),
   .doutb                     (ALG_RD_3[15:0])
   );


endmodule
